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	TESTING AND DEBUGGING OF EMBEDDED COMPUTING SYSTEMS BASED ON LEVEL MODELS</div>

Pinkevich Vasiliy Yu., Platunov Alexey E

doi:10.17586/2226-1494-2018-18-5-801-808

2018 , VOLUME 18, NUMBER 5 ( September-October )

ISSN 2226-1494 (print), ISSN 2500-0373 (online)

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Nikiforov
Vladimir O.
D.Sc., Prof.

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doi: 10.17586/2226-1494-2018-18-5-801-808

TESTING AND DEBUGGING OF EMBEDDED COMPUTING SYSTEMS BASED ON LEVEL MODELS

V. Y. Pinkevich, A. E. Platunov

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Article in Russian

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Pinkevich V.Yu., Platunov A.E. Testing and debugging of embedded computing systems based on level models.Scientific and Technical Journal of Information Technologies, Mechanics and Optics, Mechanics and Optics, 2018, vol. 18, no. 5, pp. 801–808 (in Russian). doi: 10.17586/2226-1494-2018-18-5-801-808

Abstract

Subject of Research.The paper deals with the problem of organization of testing and debugging in complex (full stack) projects of embedded computing systems with heterogeneous structure. The work is aimed at unified formal method development to organize testing and debugging that is applicable to a wide range of embedded systems and invariant to their implementation. The conclusion is drawn about the prospects of using level models of embedded systems representation as a method of unified modeling of complex projects of embedded systems. Method. To develop the method, we used the abstractions of the HLD-methodology of embedded systems design, the "model-process-processor" architectural style and methods of set theory. Main Results. The embedded systems testing and debug method based on level models is developed. We enhanced the "model-process-processor" architectural style, as a part of the method, for a more accurate description of the virtualization relations. The method of embedded systems multi-level testing is developed, which allows describing the test environment at different phases of embedded systems creation in the same style, provides the formalization of the concepts of testing, verification and validation from the embedded systems level representation point of view. Examples of description of multi-level embedded systems using the developed method are given. Practical Relevance. The method provided documentation techniques of embedded systems test environments at different phases of their creation, ways to organize testing, verification, validation and debugging in complex projects of embedded systems.The proposed approach increases requirements control efficiency in the embedded systems projects owing to the end-to-end and transparent project representation as a whole and formalization of the testing and debugging procedures.

Keywords: embedded systems, testing, verification, validation, debug, high-level design, virtual machine, computing platform

References

Marwedel P. Embedded System Design: Embedded Systems, Foundations of Cyber-Physical Systems. 2^nd ed. Springer, 2011, 400 p. doi: 10.1007/978-94-007-0257-8
Lee E.A., Seshia S.A. Introduction to Embedded Systems: A Cyber-Physical Systems Approach. 2^nd ed. MIT Press, 2017.
Karpov Yu.G. Model Checking. Verification of Parallel and Distributed Software Systems. St. Petersburg, BKhV-Peterburg Publ., 2010, 560 p. (in Russian)
Sangiovanni-Vincentelli A., Damm W., Passerone R. Taming Dr. Frankenstein: contract-based design for cyber-physical systems. European Journal of Control, 2012, vol. 18, no. 3, pp. 217–238. doi: 10.3166/EJC.18.217-238
Lettnin D., Winterholer M. Embedded Software Verification and Debugging. Springer, 2017, 208 p. doi: 10.1007/978-1-4614-2266-2
Nepeivoda N.N., Skopin I.N. Reasons for Programming. Moscow-Izhevsk, Institute of Computer Research Publ., 2003, 913 p. (in Russian)
Platunov A., Kluchev A., Penskoi A. Expanding design space for complex embedded systems with HLD-methodology. Proc. 6^th Int. Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2014, pp. 157–164. doi: 10.1109/icumt.2014.7002096
Platunov A.E. Reconfigurable embedded systems and system-on-chip. Journal of Instrument Engineering, 2014, vol. 57, no. 4, pp. 49–52. (in Russian).
Adir A., Copty S., Landa S., Nahir A., Shurek G., Ziv A., Meissner C., Schumann J. A unified methodology for pre-silicon verification and post-silicon validation. Proc. Design, Automation & Test in Europe. Grenoble, France, 2011. doi: 10.1109/DATE.2011.5763252
Wagner I., Bertacco V. Reversi: post-silicon validation system for modern microprocessors. Proc. IEEE Int. Conf. on Computer Design. Lake Tahoe, USA, 2008. doi: 10.1109/ICCD.2008.4751878
Broekman B., Notenboom E. Testing Embedded Software. Addison-Wesley, 2003, 368 p.
Penskoi A.V. Architectural specification of embedded systems with multi-level configuration. Journal of Instrument Engineering, 2015, vol. 58, no. 7, pp. 527–532 (in Russian).
Klyuchev A.O., Kustarev P.V., Paltashev T.T., Platunov A.E. HLD-methodology application for reconfigurable embedded systems design. Scientific and Technical Journal of Information Technologies, Mechanics and Optics, 2014, no. 4, pp. 74–82. (in Russian)
Carloni L., De Bernardinis F., Pinello C., Sangiovanni-Vincentelli A.L., Sgroi M. Platform-based design for embedded systems. In The Embedded Systems Handbook. Ed. R. Zurawski. Boca Raton, CRC Press, 2005, 1112 p.
Pinkevich V., Yanalov R., Platunov A. Hardware computational units design with combined debug capabilities. Proc. 17^th Int. Multidisciplinary Scientific GeoConference, SGEM, 2017, vol. 17, no. 21, pp. 77–84. doi: 10.5593/sgem2017/21/s07.011
Pinkevich V.Yu. An approach to design of FPGA-based systems for stream data processing with capability of combined debugging. Journal of Instrument Engineering, 2017, vol. 60, no. 10, pp. 967–972. (in Russian) doi: 10.17586/0021-3454-2017-60-10-967-972

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