DOI: 10.17586/2226-1494-2018-18-2-339-345


N. N. Nevirkovets , N. M. Chernetskaya, D. V. Kostygov, Y. V. Belyaev

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For citation: Nevirkovets N.N., Chernetskaya N.M., Kostygov D.V., Belyaev Ya.V. Integrated circuits timing analysis with account of pad models and bond wires. Scientific and Technical Journal of Information Technologies, Mechanics and Optics, 2018, vol. 18, no. 2, pp. 339–345 (in Russian). doi: 10.17586/2226-1494-2018-18-2-339-345


Subject of Research.Timing analysis is an important stage in the design of integrated circuits. It makes possible to detect various types of errors, related both to the structure of blocks and to the violation of temporal characteristics at all levels of abstraction. It is especially important to detect errors in the interface blocks of the integrated circuit, since, otherwise, the final device may not meet the requirements of dynamic characteristics. Method. A technique for timing analysis of the integrated circuit is proposed considering the models of the contact pads and package bond wires, designed for taking into account the effect of the parameters of contact pads, bond wires, and external analog components. The technique is an extension of the standard IC verification flow with the addition of stages for analyzing and modeling of the contact pad parameters and bond wires. Main Results. The technique was used to verify the I2C interface block according to 350 nm technology. The I2C interface was included in the integrated circuit of a micromechanical accelerometer. The technique gives the possibility for detecting of errors that were not revealed during the integrated circuit design in accordance with the traditional design flow. The dynamic characteristics of the I2C controller were determined when connecting the SCK and SDA buses to the supply voltage through a resistor of 10 kΩ. Practical Relevance. The proposed technique can be used in the design of integrated circuit interface blocks. The technique takes into account the effect of the parameters of the contact pads and package of the integrated circuit, bond wires and external components on the dynamic characteristics of the circuit. It is advisable to use the technique for critical blocks, in particular, interface ones, the inoperability of which can lead to the impossibility of exchanging IC data with the consumer and, as a result, high financial costs for a new stage of IC design.

Keywords: micromechanical accelerometer, integrated circuits, digital integrated circuits, timing analysis, register-transfer model

Acknowledgements. This work was supported by the project no. 16-08-00640 of the Russian Foundation for Basic Research, the Russian Federation.

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