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Editor-in-Chief
Nikiforov
Vladimir O.
D.Sc., Prof.
Partners
doi: 10.17586/2226-1494-2017-17-2-301-311
WHATCHDOG MECHANISMS IN EMBEDDED SYSTEMS
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Article in Russian
For citation: Platunov A.E., Sterkhov A.S. Whatchdog mechanisms in embedded systems. Scientific and Technical Journal of Information Technologies, Mechanics and Optics, 2017, vol. 17, no. 2, pp. 301–311 (in Russian). doi: 10.17586/2226-1494-2017-17-2-301-311
Abstract
For citation: Platunov A.E., Sterkhov A.S. Whatchdog mechanisms in embedded systems. Scientific and Technical Journal of Information Technologies, Mechanics and Optics, 2017, vol. 17, no. 2, pp. 301–311 (in Russian). doi: 10.17586/2226-1494-2017-17-2-301-311
Abstract
The paper provides an overview of the watchdog mechanisms which are a category of technical solutions aimed at reliability improvement of embedded computing systems. The works presented in the foreign literature are mainly devoted to partial problems of watchdog mechanisms creation and application. The Russian-language sources are free of information, systematizing understanding of these mechanisms. Engineers’ lack of awareness in matters relating to these elements, important and difficult for integration into system, leads to their inefficient and even unskilled usage. This, in turn, can reduce reliability. The paper deals with a basic model that reflects operation principle of the watchdog mechanism. The analysis of technical solutions presented in literature and used for error detection was carried out. Their classification was proposed. The compact table form shows the main properties of these solutions. Review of solutions improving the efficiency of watchdog mechanisms was made. Today the most important problem is the lack of process automation tools which would give the possibility to integrate the watchdog mechanism effectively and correctly in projected hardware-software system in view of specified criteria (error detection time and response time). These questions are discussed in the final sections of this paper in form of setting targets for future research. The paper is addressed to researchers and developers concerned with embedded systems design and improvement of their operational reliability.
Keywords: watchdog mechanisms, embedded system reliability, watchdog timers, watchdog processors, embedded systems
References
References
1. Leveson N.G., Turner C.S. An investigation of the Therac-25 accidents. Computer, 1993, vol. 26, no. 7, pp. 18–41. doi: 10.1109/MC.1993.274940
2. Ganssle J. A Designer's Guide to Watchdog Timers. Available at: http://www.digikey.com/en/articles/techzone/2012/may/a-designers-guide-to-watchdog-timers (accessed: 01.11.2016).
3. Kobayashi H., Shiraishi K., Tsuchiya H. et. al. Evaluation of LSI soft errors induced by terrestrial cosmic rays and alpha particles. Available at: http://www.rcnp.osaka-u.ac.jp/~annurep/2001/genkou/sec3/kobayashi.pdf (accessed: 01.11.2016).
4. Soft errors in electronic memory - a white paper. Available at: http://tezzaron.com/media/soft_errors_1_1_secure.pdf (accessed: 01.11.2016).
5. Cataldo A. SRAM soft errors cause hard network problems. Available at: http://www.eetimes.com/document.asp?doc_id=1143781 (accessed: 01.11.2016).
6. Knight J.C. Safety critical systems: challenges and directions. Proc. 24th Int. Conf. on Software Engineering, 2002, pp. 547–550. doi: 10.1145/581339.581406
7. Lee P.A., Anderson T. Fault Tolerance: Principles and Practice. Vienna, Springer Vienna, 1990, 320 p. doi: 10.1007/978-3-7091-8990-0
8. Goloubeva O., Rebaudengo M., Sonza Reorda M., Violante M. Software-Implemented Hardware Fault Tolerance. NY, Springer, 2006, 227 p. doi: 10.1007/0-387-32937-4
9. Koren I., Krishna C.M. Fault Tolerant Systems. San Francisco: Morgan Kaufmann Publ., 2007, 400p.
10. Rajabzadeh A., Miremadi S.G., Mohandespour M. Error detection enhancement in COTS superscalar processors with performance monitoring features. Journal of Electronic Testing, 2004, vol. 20, no. 5, pp. 553–567. doi: 10.1023/B:JETT.0000042519.31454.1b
11. Goloubeva O., Rebaudengo M., Sonza Reorda M., Violante M. Soft-error detection using control flow assertions. Proc. 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2003, pp. 581–588. doi: 10.1109/DFTVS.2003.1250158
12. Majzik I., Holh W., Pataricza A., Sieh V. Multiprocessor checking using watchdog processors. Computer Systems Science and Engineering, 1996, vol. 11, no. 5, pp. 301–310.
13. Benso A., Di Carlo S., Di Natale G., Prinetto P. A watchdog processor to detect data and control flow errors. Proc. 9th IEEE On-Line Testing Symposium, IOLTS, 2003, pp. 144–148. doi: 10.1109/OLT.2003.1214381
14. Bergaoui S., Vanhauwaert P., Leveugle R. IDSM: an improved disjoint signature monitoring scheme for processor behavioral checking. Proc. 15th Latin American Test Workshop - LATW, 2014, pp. 1–6. doi: 10.1109/LATW.2014.6841915
15. Rajabzadeh A. A 32-bit COTS-based fault-tolerant embedded system. Proc. 11th IEEE On-Line Testing Symposium, IOLTS, 2005, pp. 205v206. doi: 10.1109/IOLTS.2005.5
16. Djambazova E., Djambazov K. Processor control-flow error-detection techniques-model and evaluation tool. Cybernetics and Information Technologies, 2001, vol. 1, no. 2, pp. 3–18.
17. Ganssle J. Great Watchdog Timers for Embedded Systems. Available at: http://www.ganssle.com/watchdogs.htm (accessed: 01.11.2016).
18. Timofeev V. 5.4 Watchdog Timer. Available at: http://www.pic24.ru/doku.php/osa/articles/wdt (accessed: 01.11.2016).
19. Japenga B. Guidelines for Creating Robust Embedded Systems. Part 7 – Creating Robust Watchdog Timers. Great Watchdog Timers. Available at: http://www.microtoolsinc.com/RobustGuidelines7.pdf (accessed: 01.11.2016).
20. Chakravarty S., Tomar R., Arora M. Watchdog Timer for Fault-Tolerant Systems. Elektronnye Komponenty, 2008, no. 12, pp.15–20.
21. Lamberson J. Single and Multistage Watchdog Timers. Available at: http://www.sensoray.com/downloads/appnote_826_watchdog_1.0.0.pdf (accessed: 01.11.2016).
22. Gehlot P. Watchdog Timer for Robust Embedded Systems. Electronics for you, 2015, no. 2, pp. 60–62.
23. Murphy N. Watchdog timers. Embedded Systems Programming, 2000, vol. 13, no. 12, pp. 112–124.
24. Pohronska M., Krajcovic T. Fault-tolerant embedded systems with multiple FPGA implemented watchdogs. Available at: https://pdfs.semanticscholar.org/4577/ acea8ac928150d119053a43d2ab9ff207cd6.pdf, свободный. Яз. англ. (accessed: 01.11.2016).
25. El-Attar A.M., Fahmy G. An improved watchdog timer to enhance imaging system reliability in the presence of soft errors. Proc. IEEE Int. Symposium on Signal Processing and Information Technology, 2007, pp. 1100–1104. doi: 10.1109/ISSPIT.2007.4458184
26. Pont M.J., Ong R.H.L. Using watchdog timers to improve the reliability of single-processor embedded systems: Seven new patterns and a case study. Proc. First Nordic Conference on Pattern Languages of Programs, 2002, pp. 159–200.
27. Cunha J.C. Reset-driven fault tolerance. Lecture Notes in Computer Science, 2002, vol. 2485, pp. 102–120. doi: 10.1007/3-540-36080-8_13
28. Schlaepfer E. Comparison of Internal and External Watchdog Timers. Available at: https://www.maximintegrated.com/en/app-notes/index.mvp/id/4229 (accessed: 01.11.2016).
29. Du B., Reorda S., Sterpone L., Parra L. et al. Online test of control flow errors: anew debug interface-based approach. IEEE Transactions on Computers, 2016, vol. 65, no. 6, pp. 1846–1855. doi: 10.1109/TC.2015.2456014
30. Boroomandnezhad T., Azgomi M.A. An efficient control-flow checking technique for the detection of soft-errors in embedded software. Computers & Electrical Engineering, 2013, vol. 39, no. 4, pp. 1320–1332. doi: 10.1016/j.compeleceng.2013.03.015
31. Abdi A., Asghari S.A., Pourmozaffari S., Taheri H., Pedram H. An effective software implemented data error detection method in real time systems. Advances in Computer Science, Engineering & Applications, 2012, vol. 106, pp. 919–926. doi: 10.1007/978-3-642-30157-5_91
32. Avizienis A. et al. Basic concepts and taxonomy of dependable and secure computing. IEEE Transactions on Dependable and Secure Computing, 2004, vol. 1, no. 1, pp. 11–33. doi: 10.1109/TDSC.2004.2
33. Hooman J., Hendriks T. Model-based run-time error detection. Lecture Notes in Computer Science, 2007, vol. 5002, pp. 225–236. doi: 10.1007/978-3-540-69073-3_24
34. Geffroy J.C., Motet G. Design of Dependable Computing Systems. Dordrecht: Springer, 2002, 672 p. doi: 10.1007/978-94-015-9884-2
35. Penskoi A. V. Architectural specification of embedded systems with multi-level configuration. Izvestiya Vysshikh Uchebnykh Zavedeniy. Priborostroenie, 2015, vol. 58, no. 7, pp. 527–532 (in Russian).
36. Platunov A., Kluchev A., Penskoi A. HLD methodology: the role of architectural abstractions in embedded systems design. Proc. 14th Geo Conference on Informatics, Geoinformatics and Remote Sensing, 2014, pp. 209–218.
37. Teich J. Hardware/software codesign: the past, the present, and predicting the future. Proc. IEEE, 2012, vol. 100, pp. 1411–1430. doi: 10.1109/JPROC.2011.2182009
38. Platunov A., Nickolaenkov A. Aspects in the design of software-intensive systems. Mediterranean Conference on Embedded Computing, MECO, 2012, pp. 84–87.
39. Jozwiak L., Nedjah N. Modern architectures for embedded reconfigurable systems - a survey. J. of Circuits, Systems, and Computers, 2009, vol. 18, no. 2, pp. 209–254. doi: 10.1142/s0218126609005034
40. Jozwiak L., Nedjah N., Figueroa M. Modern development methods and tools for embedded reconfigurable systems: a survey. Integration, the VLSI j, 2010, vol. 43, no. 1, pp. 1–33. doi: 10.1016/j.vlsi.2009.06.002
41. Platunov A.E. Reconfigurable embedded systems and system-on-chip. Izvestiya Vysshikh Uchebnykh Zavedeniy. Priborostroenie,2014, vol. 57, no. 4, pp. 49–52. (in Russian).
42. Hartenstein R. The relevance of reconfigurable computing. In: J.M.P. Cardoso, M. Hübner (eds.), Reconfigurable Computing: From FPGAs to Hardware/Software Codesign. Springer, 2011, 296 p.
