AN ALGORITHM FOR COMPACT FIXED-POINT IMPLEMENTATION OF DIGITAL CONTROLLERS
Read the full article
For citation: Karimov T.I., Solnitsev R.I., Butusov D.N., Ostrovskiy V.Yu. An algorithm for compact fixed-point implementation of digital controllers. Scientific and Technical Journal of Information Technologies, Mechanics and Optics, 2018, vol. 18, no. 3, pp. 493–504 (in Russian). doi: 10.17586/2226-1494-2018-18-3-493-504
We propose and study the algorithm of digital controllers implementation in fixed-point arithmetic based on the adaptive selection of a discrete transform and a discrete operator (z- or δ-operator). An experimental verification of the proposed criteria for the transform and operator selection is performed, also results of the proposed algorithm testing are given. Suggested approach made it possible to reduce the number of utilized logic elements in the FPGA or ASIC implementation of controllers up to 2-3 times and more in comparison with the traditional technique based on the application of the Tustin transform and z-operator, and also reduce the development complexity. The obtained results are of practical importance in the electronic units design for autonomous embedded systems, space vehicles and other objects with restricted mass, dimensions and power consumption, giving the possibility to overcome these restrictions.
Ahmadi A., Zwolinski M. Word-length oriented multiobjective optimization of area and power consumption in DSP algorithm implementation. Proc. 25th Int. Conf. on Microelectronics. Belgrade, Serbia, 2006, pp. 614–617. doi: 10.1109/ICMEL.2006.1651042
Govindu G.,Zhuo L., Choi S., Gundala P., Prassanna V. Area, and power performance analysis of a floating-point based application on FPGAs. Los Angeles, University of Southern California, 2003.
Te Ewe C., Cheung P.Y.K., Constantinides G.A. Dual fixed-point: an efficient alternative to floating-point computation. Lecture Notes in Computer Science, 2004, vol. 3203,
Aruna K., Bhaskararao J. Design and implementation of fixed point and floating point PID controllers in VIVADO HLS using FPGA. International Journal of VLSI System Design and Communication Systems, 2016, vol. 4, no. 9, pp. 799–804.
Finnerty A., Ratigner H. Reduce Power and Cost by Converting from Floating Point to Fixed Point. XILINX White Paper 491, 2017, 14 p.
Schneider A.M., Kaneshige J.T., Groutage F.D. Higher order s-to-z mapping functions and their application in digitizing continuous-time filters. Proceedings of the IEEE, 1991, vol. 79, no. 11, pp. 1661–1674. doi: 10.1109/5.118990
Jackson L., Lindgren A., Kim Y. Optimal synthesis of second-order state-space structures for digital filters. IEEE Transactions on Circuits and Systems, 1979, vol. 26, no. 3, pp. 149–153. doi: 10.1109/TCS.1979.1084623
Middleton R., Goodwin G.C. Improved finite word length characteristics in digital control using delta operators. IEEE Transactions on Automatic Control, 1986, vol. 31, no. 11, pp. 1015–1021. doi: 10.1109/TAC.1986.1104162
Kauraniemi J., Laakso T.I., Hartimo I., Ovaska S.J. Delta operator realizations of direct-form IIR filters. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1998, vol. 45, no. 1, pp. 41–52. doi: 10.1109/82.659455
Butusov D.N., Karimov T.I., Kaplun D.I., Karimov A.I. Delta operator filter design for hydroacoustic tasks. Proc. 6th Mediterranean Conference on Embedded Computing. Bar, Montenegro, 2017, art. 7977213. doi: 10.1109/MECO.2017.7977213
Butusov D.N., Karimov T.I., Karimov A.I. Modified delta-transform for special computing devices design. Sovremennye Problemy Nauki i Obrazovaniya, 2014, no. 3, p. 76. (in Russian)
Butusov D.N., Karimov T.I., Kaplun D.I., Karimov A.I., Huang Y., Li S.C. The choice between delta and shift operators for low-precision data representation. Proc. 20th Conf. of Open Innovations Association, FRUCT. St. Petersburg, 2017, pp. 46–52. doi: 10.23919/FRUCT.2017.8071291
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License