DOI: 10.17586/2226-1494-2018-18-5-801-808


TESTING AND DEBUGGING OF EMBEDDED COMPUTING SYSTEMS BASED ON LEVEL MODELS

V. Y. Pinkevich, A. E. Platunov


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For citation: Pinkevich V.Yu., Platunov A.E. Testing and debugging of embedded computing systems based on level models.Scientific and Technical Journal of Information Technologies, Mechanics and Optics, Mechanics and Optics, 2018, vol. 18, no. 5, pp. 801–808 (in Russian). doi: 10.17586/2226-1494-2018-18-5-801-808

Abstract
Subject of Research.The paper deals with the problem of organization of testing and debugging in complex (full stack) projects of embedded computing systems with heterogeneous structure. The work is aimed at unified formal method development to organize testing and debugging that is applicable to a wide range of embedded systems and invariant to their implementation. The conclusion is drawn about the prospects of using level models of embedded systems representation as a method of unified modeling of complex projects of embedded systems. Method. To develop the method, we used the abstractions of the HLD-methodology of embedded systems design, the "model-process-processor" architectural style and methods of set theory. Main Results. The embedded systems testing and debug method based on level models is developed. We enhanced the "model-process-processor" architectural style, as a part of the method, for a more accurate description of the virtualization relations. The method of embedded systems multi-level testing is developed, which allows describing the test environment at different phases of embedded systems creation in the same style, provides the formalization of the concepts of testing, verification and validation from the embedded systems level representation point of view. Examples of description of multi-level embedded systems using the developed method are given. Practical Relevance. The method provided documentation techniques of embedded systems test environments at different phases of their creation, ways to organize testing, verification, validation and debugging in complex projects of embedded systems.The proposed approach increases requirements control efficiency in the embedded systems projects owing to the end-to-end and transparent project representation as a whole and formalization of the testing and debugging procedures.

Keywords: embedded systems, testing, verification, validation, debug, high-level design, virtual machine, computing platform

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